Click on the above image to enlarge
Silicon chips are at the heart of electronic devices such as laptops, smart phones, tablets and many other modern gadgets. Silicon chips are typically only a few mms on edge so, depending on its size, just one silicon wafer can usually make many 100s of chips (in some cases more than a 1000). These highly perfect, circular wafers are ground, sliced and polished from near-circular single crystal ingots that are pulled from molten silicon, as shown in the figure below
At the start of the silicon chip era some 60 years ago, silicon wafers were only about one inch in diameter; they are now the size of large dinner plates, typically 12-inches in diameter (see photo in poster), in response to the economics of manufacturing large quantities of chips. However, as the size of transistors in silicon chips continually decreased in accordance with Moore’s Law, the quality and uniformity of the ever larger silicon crystals and wafers had to be continually improved since the tiniest of defects could render the chips useless.
A major problem in pulling large silicon crystals from the melt by the Czochralski process is the control of the movement of the melt, known as melt convection, which is a necessary process for the transfer of heat but can adversely affect the quality of the pulled crystal. Large crucibles around 1 metre in diameter can contain nearly half a ton of molten silicon at temperatures above 1420 degrees Centigrade (white hot!). On such a scale, the thermal convection resulting from the temperature gradients in the melt can be so turbulent that the quality and uniformity of the pulled silicon crystal can be completely destroyed by the introduction of crystal defects.
Research at RSRE Malvern in the 1980s showed that crystal quality and uniformity could be improved by controlling the adverse effects of thermal convection in large crucibles whilst maintaining the beneficial effects of the forced convective flow immediately below the rotating crystal. The figure opposite is a simple illustration of these two different convective melt flows
A practical solution was achieved by applying the basic physics of electromagnetism. If a magnetic field intersects a moving electrical conductor, such as a silicon melt, it can reduce the movement, i.e. it can damp melt convection; if the magnetic field does not intersect a moving conductor – e.g. the forced convection beneath the rotating silicon crystal – then that flow will not be damped. As shown schematically in the figure opposite, by designing a shaped magnetic field (broken lines) in the crucible, thermal convection could be damped whilst the beneficial effects of forced convection could be retained. The process became known as MALMAG and, as described in the poster, was eventually patented and licensed internationally for the growth of ~12 inch diameter silicon crystals used to manufacture millions of 12inch diameter wafers, the current industrial standard for the mass production of silicon chips.
MALMAG was conceived at RSRE Malvern in 1985 and the first patent application was filed in 1988; it was patented internationally in DRA/DERA in the 1990s and commercially exploited by QinetiQ plc from c.2004-2010. In part of his forthcoming book, ‘Cheap as Chips’, Keith Barraclough traces the story of MALMAG during this 25 year period of substantial change to Malvern’s research establishment.
KGB, 9 July, 2018